Modular Operational Semantic Speciication of Transport Triggered Architectures

The formal speciication of hardware at the instruction level is a daunting task. The complexity, size and intricacies of most instruction sets makes this task even more diicult. However, the beneets of such a speciication can be quite rewarding: a precise, unambiguous description is provided for each instruction, a basis for proving the correctness of code transformations is made available, and the speciication can be animated, providing a simulator. This paper proposes a high level structural operational semantic (S.O.S.) speciication for the class of transport triggered architectures. These architectures are simple, powerful, exible and modular and can exploit very ne grained parallelism. The S.O.S. is novel in that it follows the structure of the architecture, and by doing so inherits the modularity of the architecture.